Anodic bonding is a process of joining a alkali glass and silicon substrate together using heat and voltage. Typical glasses are Corning 7740 (Pyrex) and Borofloat from Schott Glass. Advantages of Anodic bonding over other Substrate bonding techniques is the low pressure, hermetic seal, and strength of the bond form. Disadvantages include the high voltage and temperatures required.
The LNF has two bonders available for anodic bonding.
This is the recommended tool for anodic bonding. The default setup on the SB-6E Bonder is for 4 inch round substrates. 6 inch round substrates can also be accommodated but a tooling change must coordinate with the tool engineer. Alignment for 4" and 6" round samples is accomplished using the MA-BA-6 Mask-Bond Aligner in Bond Alignment mode.
EVG 520IS Bonder
The EVG 520IS can easily be used to bond pieces, 4" and 6" wafers. Bond alignment for 4" and 6" wafers is done with the EVG 620 Bond Aligner. The default pressure plate is metal and you will have to coordinate with the tool engineer for it to be changed to a quartz plate for anodic bonds.
Method of operation
Two polished and clean substrates are brought into contact with each other. One substrate is glass, typically Pyrex 7740, the other is a material that easily forms an oxide, typically Silicon. This stack is raised to a temperature between 180-450°C and a voltage of 500-1000V is applied across the stack with the glass being positive. The electric filed causes the mobile sodium ions to migrate towards the glass negative contact. This leaves Oxygen at the silicon glass interface. The Silicon and Oxygen atoms bond and form a very strong SiO2 interface. The strong electrostatic fields used in anodic bonding bring the wafers into intimate contact allowing minimal force to be used.
Anodic wafer bonding is used to join silicon and glass wafer together. It is frequently used at the end of process for wafer level packaging. More recent developments have moved the anodic bonding process to earlier in the MEM's fabrication where one or both of the wafers are thin. This allows the the thin wafer to be safely handled and processed and the final device to have both a silicon and glass component. This can give additional freedom in MEMs designs for thermal, electrical, and mechanical design considerations.
- Two polished wafers, 1 Glass and 1 Si (or other material that readily forms a strong oxide) are brought together.
- The temperature is raised to between 180-450°C
- A DC voltage is applied across the stack.
- The electrostatic (DC) voltage creates a large electrostatic force that pulls the two substrates into intimate contact.
- The electric field causes mobile sodium ions to migrate towards the glass negative contact. This leaves oxygen at the interface between the glass and Si.
- The oxygen bonds to the Si atoms at the surface, creating a very strong SiO2 bond.
- The two wafers are permanently bonded together because the SiO2 bond is stronger than the Si-Si bond or the glass.
There are two major catagores of parameters to worrie about, Desing and Layout considerations, and processes parameters.
Design and Layout Parameters
- Contact Area
- Materials on Wafers
- Voltage Flow Path
- Between 180°C and 500°C
- Depends on your materials.
- Different thermal expansions of substrates will lead to stress and curvature post bond
- Selecting a temperature where the amount of expansion of each substrate is the same will minimize substrate curvature post bond.
- Can be done in atmospheric, vacuum, or other atmosphere.
- At higher pressures bubbles are more likely in the bond interface.
Madou, Marc J (2012), Fundamentals of Microfabrication and Nanotechnology, Volume III
- Substrate bonding technology talk