Doping diffusion
Doping diffusion is a process used to introduce precisely controlled impurities into a material to change it's electrical, optical or structural properties. In some cases, these impurities can be introduced uniformly throughout the material during the deposition of the material. In other cases these impurities can be introduced at the surface of the material using a solid, liquid or gaseous source and then distributed more evenly throughout the material using diffusion. The diffusion of these impurities occurs more rapidly at higher temperatures. Dopant processes available in the LNF include:
Doping diffusion | |
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Technology Details | |
Technology | Thermal processing |
Equipment | List of doping diffusion equipment |
Warning: | This page has not been released yet. |
1) Phosphorus doping of silicon to form n-type silicon by creating excess electron carriers.
2) Boron doping of silicon to form p-type silicon by creating excess hole carriers. Heavily boron-doped silicon also will etch notably slower than lightly-doped silicon in some chemistries (for example KOH and EDP) which can make it useful as an etch stop layer.
3) Liquid spin on dopants are commercially available which can be applied on the Spinner CEE Apogee after approval and training by the tool engineer. Typically a precise heat treatment is then required to diffuse the dopant into the surface of the substrate to obtain the proper doping concentration.
Contents
Equipment
Tempress S5T1 - Phosphorous Diffusion
The Tempress S5T1 furnace tube is a CMOS clean, modular, horizontal furnace tube that bubbles nitrogen gas through a POCl3 liquid source to introduce POCl3 into the furnace. This POCl3 reacts with O2 gas to form P2O5. Wherever silicon is exposed, the P2O5 reacts with the silicon to form phosphosilicate glass (PSG) and phosphorus dissolves into the silicon surface. The phosphorus which dissolves into the silicon is controlled by the temperature of deposition which affects the solid solubility of phosphorus in silicon. Some of the phosphorus which dissolves into the silicon incorporates into the silicon crystal lattice and contributes a free electron carriers.
Tempress S5T3 - Boron Diffusion 4"
The Tempress S5T3 furnace tube is a CMOS clean, modular, horizontal furnace tube that uses a solid boron source which is placed in contact with the surface of the silicon wafer. The concentration of boron at the silicon surface will be controlled by the solid solubility limits of silicon which vary with temperature. The diffused boron that incorporates into the silicon crystal lattice will contribute free hole carriers. Silicon which has been heavily doped with boron can serve as an etch stop during anisotropic etching of lighter-doped silicon in KOH and EDP chemistries.
Tempress S3T4 - N-type In-situ Doped Polysilicon
The Tempress S3T4 furnace tube is a CMOS clean, modular, horizontal furnace tube that can deposit n-type polysilicon.
Tempress S5T3 - Boron Diffusion 4"
The Tempress S5T3 furnace tube is a CMOS clean, modular, horizontal furnace tube that can deposit p-type polysilicon.
Spinner CEE Apogee
The CEE Apogee can also be used to spin liquid dopant sources onto the wafer. These materials are readily available from various vendors but are not supplied by the LNF. Any material must be approved by the LNF before it can be used and these materials require additional specialized equipment training before they can be used on any LNF equipment. Please obtain approval before ordering any materials.
Materials
- Phosphorous (liquid source)
- Boron (solid source)
- Spin on Dopants (liquid source, commercially available but not supplied by the LNF)
Method of operation
Describe how the technology works.
Applications
- MEMS
- MOS devices
Complete tool list
See also
Other related wiki pages
References
Further reading
- LNF Tech Talk for Doping diffusion is Coming Soon!
- Other stuff, e.g. technology workshop slides
- External links (can be in another section below, if appropriate)
[[Category:{{|var:acronym|{{PAGENAME}}}}]] [[Category:Thermal processing][:Spinner CEE Apogee]]