P5000 RIE/Chamber C

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P5000 RIE
Chamber C
Equipment Details
Manufacturer Applied Materials
Model Precision 5000 MxP Etch
Technology RIE
Materials Restriction CMOS Clean
Material Processed Poly-Si 3800 Å/min
Mask Materials PR, SiO2
Sample Size 150 mm*
Gases Used O2
10% O2 in He
Equipment Manual
Overview System Overview
Supported Processes Supported Processes
Maintenance Maintenance
*Smaller samples may be mounted to a 6" carrier

Chamber C is part of the Applied Materials P5000 RIE system. It is configured for thin film Si etching, including Polysilicon. Please see the main tool page for more details including the SOP and training procedure.


  • Etch Rate
  • Wafer to wafer average etch rate variation: ±2%
  • Within wafer etch rate non-uniformity: < ±5%
  • Maximum depth and aspect ratio dependent on feature size. For more details, please see the supported processes.

System Overview

Hardware Details

  • Single frequency RF – 1000 Watts @ 13.56 Mhz
  • Temperature controlled electrostatic chuck: 40°C
  • Pressure Regulation: Closed loop via process chamber 1 Torr baratron pressure gauge and turbo pump throttle valve
  • Gases

Substrate Requirements

  • A 150 mm carrier wafer must be used for 100 mm wafers and smaller pieces. For information on mounting techniques, please read about sample mounting.
  • Thickness: Do not process samples that are thicker than standard wafer thicknesses (675 µm +/-25 µm).
  • Substrate surfaces should be clean and free from particulates. Inadequate cleaning of the wafer backside will cause the process to abort and may result in loss of tool authorization.

Material Restrictions

The P5000 RIE/Chamber C is designated as a CMOS Clean class tool. Below is a list of approved materials for the tool. Approved means the material is allowed in the tool under normal circumstances. If a material is not listed, please create a helpdesk ticket or email info@lnf.umich.edu for any material requests or questions.

Supported Processes

There are several processes for etching polysilicon and amorphous silicon that are supported on Chamber C. For more details, see the P5000 RIE/Processes page.