Difference between revisions of "Packaging"

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==Further reading==
 
==Further reading==
 +
*[http://lnf-wiki.eecs.umich.edu/wiki/User_Resources#LNF_Tech_Talks_.28technology_seminar_series.29 LNF Tech Talk for Packaging is Coming Soon!]
 
* Other stuff, e.g. technology workshop slides
 
* Other stuff, e.g. technology workshop slides
 
* External links (can be in another section below, if appropriate)
 
* External links (can be in another section below, if appropriate)

Latest revision as of 10:58, 31 March 2020

Packaging is used to describe many different technologies used after processing of the devices. Typically these technologies are used to separate the devices from the wafer, isolate the devices, and make electrical connections to the device.

Technologies

The semiconductor industry has seen a significant increase in the number of transistors on a chip and through economies of scale, reduced the cost per transistor of these devices. However, the packaging of these devices has changed little in recent years. Following completion of the integrated circuits and testing, the wafers (12" - 18" diameter) are sawed into the individual chips (from a millimeter square to a few centimeters). Robots then place the devices into packages and wire bond them automatically. In certain cases, a memory chip will be flip chip bonded to a microprocessor allowing a high bandwidth connection between the memory and the processor (both in speed due to low impedance, and number of connections).

Packaging technology was much overlooked initially when developing MEMS technologies because it was thought that these devices could use integrated circuit packaging technologies. Once the devices were developed, it was found that it was very difficult to package them because often these devices not only needed electrical connections that needed to be isolated from the environment, but also needed access to the environment. While MEMS technologies were produced in mass reducing the cost, the packaging ended up the most significant cost of the devices. Wafer bonding was developed to package entire wafers full of devices at a time thereby reducing cost. Dicing and wire bonding have remained the same as they have been for integrated circuits.

Dicing

Main article: Dicing

Most processing is in batch so many devices are fabricated at the same time. Dicing is used to seperate devices from each other. There are several methods for separating the die:

  1. Wafer sawing: This uses a diamond impregnated blade to saw the chips apart. Blades are made with different widths and can saw through most common materials (silicon, glass, and the thin films on top). It is commonly used in the semiconductor electronics industry. The problem is it requires high pressure water to cool the blade, and the water can damage fragile devices and can leave particles on the surface.
  2. Scribing: This techniques uses a diamond tip stylus to make a mark on the wafer. (100) silicon will cleave at 90° planes from the flat.
  3. Laser dicing: This technique uses a high power laser to introduce defects into the silicon so the wafer can be cleaved along the line to break the die apart. The advantage of this is it is a dry process and will not damage fragile structures, however it is slower, and requires a lightly doped substrate.
  4. DRIE seperation: Uses the DRIE to etch the trench lines through the wafer. This allows complex shapes to be produced and etches a whole wafer at the same time. The disadvantages are it requires another mask and lithography step.

Wafer bonding

Main article: Wafer bonding

Wafer bonding is used to cap a device, either hermetically or can act as a dust cap to keep the micro devices from failing due to environmental issues. Cavities for the cap wafer are produced and the wafer is bonded to the substrate. A variety of methods are available to bond the cap to the substrate:

  1. Fusion bonding: Very high temperature (typical anneal of at least 1100C) is required, limiting the application. Can be used with Si to Si and fused silica wafers.
  2. Anodic bonding: Requires moderate temperatures (450C) and high voltage. This technique is used to bond silicon wafers to glass wafers (Borofloat, pyrex or other sodium containing glass).
  3. Gold eutectic bonding: Used for bonding silicon to silicon, gold and silicon form a eutectic at 370C and will form a liquid that when cooled will seal the cavity. However it can be difficult to get feed throughs through the edge of a cap.
  4. Low temperature fusion bonding: Uses a plasma or chemically activated surface to bond the samples and must be annealed up to 700C. Some bonding will occur between 200 - 400C.
  5. Solder bonding: Makes use of a eutectic between other metals such as In-Au, Cu-Sn, Au-Sn, etc to form a bond at lower temperatures. Some materials can be bonded at temperatures <200C.
  6. Polymer bonding: Activates a polymer (parylene, PDMS, photoresist, etc) and can attach it to another polymer or to glass (SiO2 on the surface). Using this method, bonds can be formed at temperatures around 100C.

Wire bonding

Main article: Wire bonding

Wire bonding is used to make electrical connections from the device to another, usually a package that will fit into a printed circuit, or makes connection to another device. Wire bonding refers to a very thin 18-100µm diameter wire often made from aluminum or gold that will be pressed to a bonding pad on the device and welded in place using ultrasonic energy, then stretched to another bonding pad often on a package and the other end of the wire is again welded in place. For the very high numbers of connections associated with many integrated circuits, this is done automatically with a pre generated map of wired connections and a high speed robot. For small scale MEMS packaging it is done manually making a few connections for electrical testing.

Flip chip bonding

Main article: Flip chip bonding

Flip chip bonding was developed by the semiconductor electronics industry to attach two die together with a very high number of electrical contacts, connected with a much lower parasitic capacitance. With the development of low temperature bonding techniques, this technique has been adapted to allow MEMS devices to be attached to integrated circuits, sealing the electrical connections and allowing environmental access.

Typically a low temperature bonding material is on the surface and one of the chips is flipped, aligned to the second, and the two are bonded together.

Applications

Some type of packaging is required for most devices. It is extremely helpful to consider the packaging while initially designing the device.

Figures of Merit

It is important to consider the final packaging techniques when developing the device. What environmental access or isolation is required? How many electrical connections will be necessary and how will they be accessed externally? How small must the final device be including all of the electrical connections and the isolations? Finally what will the cost of the packaging be?

Environmental access

Many MEMS devices include sensors. These sensors need access to the environment they are sensing. The problems that occur is that in many cases, the environment will have negative impact on the electrical connections and circuits. This is of considerable concern in biomedical sensors where saline solution under the electric fields seen in integrated circuits will etch the circuit materials. However, in many sensing modalities, access to these same environments is required by the device. Many researchers are finding other ways to keep the circuits encapsulated while allowing the sensors access to the environment.[1]

Number of electrical connections

As the number of sensing sites increase on a MEMS device, consideration must be made on how to get access to these ever increasing number of sensing sites. Many researchers are now going to adding circuits to their sensors [2] either by integrating the MEMS and the circuits on a single platform, or through a [Flipchip bonding][Category:Articles using small message boxes]] approach. The circuitry allows access to many sensing sites with fewer electrical connections to the outside world.

Electrical access

Many micro and nano devices require electrical access to utilize the system. There are several factors that need to be considered when determining how electrical connections will be made.

  1. Impedance of the electrical connection
  2. Length of the electrical connection. Between this and the previous it is possible to produce an antenna that will generate noise and may drown out the signal that would be detected.
  3. Electrical connections to the outside world have very high parasitic capacitance compared to on-chip capacitances. This may also be a source of noise.
  4. Connector size: Wire bonding pads may be very large compared to the sensing sites. This may significantly increase the size of your sensor.
  5. Method for getting signals out or into the device. This can be either wired connections, or wireless.

Size

The size of the device can effect the cost. Usually a wafer has a fixed cost of manufacture based on the devices produced. A smaller device means that more can be packed onto a single wafer, thereby reducing the cost. However, sometimes smaller devices are more difficult to package and manufacture. This can increase the cost. Therefore size and packaging must be considered initially when designing the device.

Cost

Cost must often be considered when developing devices. After the initial research and development, for MEMS devices the cost per unit decreases as volume increases (yield increased, and larger lots can be manufactured reducing setup costs). However, if most of the cost is in testing and packaging, the volume costs do not apply.

See also

Other related wiki pages

References

Further reading